View LTC3611EWPPBF_9092822.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

ltc3611 1 3611fd applications typical application description 10a, 32v monolithic synchronous step-down dc/dc converter the ltc ? 3611 is a high ef?ciency, monolithic synchronous step-down dc/dc converter that can deliver up to 10a output current from a 4.5v to 32v (36v maximum) input supply. it uses a constant on-time valley current mode control architecture to deliver very low duty cycle opera- tion at high frequency with excellent transient response. the operating frequency is selected by an external resistor and is compensated for variations in v in and v out . the ltc3611 can be con?gured for discontinuous or forced continuous operation at light load. forced continu- ous operation reduces noise and rf interference while discontinuous mode provides high ef?ciency by reducing switching losses at light loads. fault protection is provided by internal foldback current limiting, an output overvoltage comparator and an op tional short-circuit shutdown timer. soft-start capability f or sup- ply sequencing is accomplished using an external timing capacitor. the regulator current limit is user prog rammable. a power good output voltage monitor indicates when the output is in regulation. the ltc3611 is available in a compact 9mm 9mm qfn package. ef?ciency and power loss vs load current features n 10a output current n wide v in range = 4.5v to 32v (36v maximum) n internal n-channel mosfets n true current mode control n optimized for high step-down ratios n t 0n(min) 100ns n extremely fast transient response n stable with ceramic c out n 1% 0.6v voltage reference n power good output voltage monitor n adjustable on-time/switching frequency (>1mhz) n adjustable current limit n programmable soft-start n output overvoltage protection n optional short-circuit shutdown timer n low shutdown i q : 15a n available in a 9mm 9mm 64-pin qfn package n point of load regulation n distributed power systems high ef?ciency step-down converter 1h 4.7f 10f3 v in 4.5v to 32v v out 2.5v10a 3611 ta01a 182k 0.1f i on v in sw boost run/ssi th v on sgnd intv cc fcb pgnd v fb v rng 0.22f 100f2 12.5k 39.2k intv cc 11k ltc3611 680pf extv cc pgood 30.1k9.5k 100pf v out load current (a) 0.01 0 efficiency (%) power loss (mw) 5040 30 20 10 100 9080 70 60 0.1 1 10 3611 ta01b v out = 2.5v v in = 5v v in = 25v power loss,v in = 25v power loss,v in = 5v 1 10 100 1000 10000 l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. patents including 5481178, 6100678, 6580258, 5847554, 6304066. downloaded from: http:///
ltc3611 2 3611fd pin configuration absolute maximum ratings (note 1) top view wp package 64-lead (9mm 9mm) qfn multipad pgnd 1 pgnd 2 pgnd 3 sw 4sw 5 sw 6 sw 7 sw 8 sw 9 sw 10sw 11 pv in 12 pv in 13 pv in 14 pv in 15 pv in 16 48 sgnd47 sgnd 46 sgnd 45 sgnd 44 extv cc 43 v fb 42 sgnd41 i on 40 sgnd 39 fcb 38 i th 37 v rng 36 pgood35 v on 34 sgnd33 sgnd pv in 17 pv in 18 pv in 19 pv in 20 pv in 21 pv in 22 pv in 23 pv in 24 pv in 25 sw 26 nc 27 sgnd 28 boost 29 run/ss 30 sgnd 31sgnd 32 64 pgnd63 pgnd 62 pgnd 61 pgnd 60 pgnd 59 pgnd 58 pgnd 57 pgnd 56 pgnd 55 sw 54 intv cc 53 intv cc 52 sv in 51 sv in 50 sgnd49 sgnd 68 sgnd 67 pv in 66 sw 65 pgnd t jmax = 125c, ja = 28c/w order information lead free finish tape and reel part marking* package description te mperature range ltc3611ewp#pbf ltc3611ewp#trpbf ltc3611wp 64-lead (9mm 9mm) plastic qfn C40c to 125c ltc3611iwp#pbf ltc3611iwp#trpbf ltc3611wp 64-lead (9mm 9mm) plastic qfn C40c to 125c lead based finish tape and reel part marking* package description t emperature range ltc3611ewp ltc3611ewp#tr ltc3611wp 64-lead (9mm 9mm) plastic qfn C40c to 125c ltc3611iwp ltc3611iwp#tr ltc3611wp 64-lead (9mm 9mm) plastic qfn C40c to 125c c o nsult ltc marketing for parts speci?ed with wider ope rating temperature ranges. *the temperature grade is identi?ed by a label on the shipping container. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ fo r more information on tape and reel speci?cations, go to: http://www.linear.com/tapeandreel/ input supply voltage (v in , i on ) .................. 36v to C0.3v boosted topside driver supply voltage (boost) ................................................ 42v to C0.3v sw v oltage ............................................ 36v to C0.3v intv cc , extv cc , (boost C sw), run/ss, pgood voltages .......................................... 7v to C0.3v fcb, v on , v rng voltages ............ intv cc + 0.3v to C0.3v i th , v fb voltages ....................................... 2.7v to C0.3v operating junction temperature range (notes 2, 4) ............................................ C40c to 125c storage temperature range ...................C55c to 125c downloaded from: http:///
ltc3611 3 3611fd electrical characteristics symbol parameter conditions min typ max units main control loop v in operating input voltage range 4.5 32 v i q input dc supply current normal shutdown supply current 900 15 2000 30 a a v fb feedback reference voltage i th = 1.2v (note 3) C40c to 85c C40c to 125c l 0.594 0.590 0.600 0.600 0.606 0.610 v v v fb(linereg) feedback voltage line regulation v in = 4v to 30v, i th = 1.2v (note 3) 0.002 %/v v fb(loadreg) feedback voltage load regulation i th = 0.5v to 1.9v (note 3) C0.05 C0.3 % i fb feedback input current v fb = 0.6v C5 50 na g m(ea) error ampli?er transconductance i th = 1.2v (note 3) l 1.4 1.7 2 ms v fcb forced continuous threshold l 0.54 0.6 0.66 v i fcb forced continuous pin current v fcb = 0.6v C1 C2 a t on on-time i on = 60a, v on = 1.5v i on = 60a, v on = 0v 190 250 120 310 ns ns t on(min) minimum on-time i on = 180a, v on = 0v 60 100 ns t off(min) minimum off-time i on = 30a, v on = 1.5v 290 500 ns i valley(max) maximum valley current v rng = 0v, v fb = 0.56v, fcb = 0v v rng = 1v, v fb = 0.56v, fcb = 0v l l 6 8 10 15 a a i valley(min) maximum reverse valley current v rng = 0v, v fb = 0.64v, fcb = 0v v rng = 1v, v fb = 0.64v, fcb = 0v C6 C8 a a v fb(ov) output overvoltage fault threshold 7 10 13 % v run/ss(on) run pin start threshold l 0.8 1.5 2 v v run/ss(le) run pin latchoff enable threshold run/ss pin rising 4 4.5 v v run/ss(lt) run pin latchoff threshold run/ss pin falling 3.5 4.2 v i run/ss(c) soft-start charge current v run/ss = 0v C0.5 C1.2 C3 a i run/ss(d) soft-start discharge current v run/ss = 4.5v, v fb = 0v 0.8 1.8 3 a v in(uvlo) undervoltage lockout v in falling l 3.4 3.9 v v in(uvlor) undervoltage lockout release v in rising l 3.5 4 v r ds(on) top switch on-resistance bottom switch on-resistance 15 9 22 14 m m the l denotes the speci?cations which apply over the full operating temperature range, otherwise speci?cations are at t a = 25c. v in = 15v unless otherwise noted. downloaded from: http:///
ltc3611 4 3611fd symbol parameter conditions min typ max units internal v cc regulator v intvcc internal v cc voltage 6v < v in < 30v, v extvcc = 4v l 4.7 5 5.6 v v ldo(loadreg) internal v cc load regulation i cc = 0ma to 20ma, v extvcc = 4v C0.1 2 % v extvcc extv cc switchover voltage i cc = 20ma, v extvcc rising l 4.5 4.7 v v extvcc extv cc switch drop voltage i cc = 20ma, v extvcc = 5v 150 300 m/v v extvcc(hys) extv cc switchover hysteresis 500 m/v pgood output v fbh pgood upper threshold v fb rising 7 10 13 % v fbl pgood lower threshold v fb falling C7 C10 C13 % v fb(hys) pgood hysteresis v fb returning 1 2.5 % v pgl pgood low voltage i pgood = 5ma 0.15 0.4 v note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: t j is calculated from the ambient temperature t a and power dissipation p d as follows: t j = t a + (p d 28c/w) ( ja is simulated per jesd51-7 high effective thermal conductivity test board) jc = 1c/w ( jc is simulated when heatsink is applied at the bottom of the package) note 3: the ltc3611 is tested in a feedback loop that adjusts v fb to achieve a speci?ed error ampli?er output voltage (i th ). the speci?cation at 85c is not tested in production. this speci?cation is assured by design, characterization, and correlation to testing at 125c. note 4: the ltc3611 is tested under pulsed load conditions such that t j t a . the ltc3611e is guaranteed to meet speci?cations from 0c to 125c junction temperature. speci?cations over the C40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the ltc3611i is guaranteed over the full C40c to 125c operating junction temperature range. note that the maximum ambient temperature consistent with these speci ? cations is determined by speci?c operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental factors. typical performance characteristics transient response transient response (discontinuous mode) start-up v in = 25v v out = 2.5v r load = 0.5 figure 6 circuit 3611 g03 40ms/div run/ss 2v/div v out 1v/div i l 5a/div load = 1a to 10a v in = 25v v out = 2.5v fcb = intv cc figure 6 circuit 3611 g02 v out 200mv/div il 5a/div i load 5a/div 40s/div load step 0a to 8a v in = 25v v out = 2.5v fcb = 0figure 6 circuit 3611 g01 40s/div v out 200mv/div il 5a/div i load 5a/div electrical characteristics the l denotes the speci?cations which apply over the full operating temperature range, otherwise speci?cations are at t a = 25c. v in = 15v unless otherwise noted. downloaded from: http:///
ltc3611 5 3611fd typical performance characteristics frequency vs load currentload current vs i th voltage and v rng on-time vs i on current on-time vs v on voltage ef?ciency vs load current ef?ciency vs input voltage frequency vs input voltage i th voltage (v) 0 load current (a) 5 10 15 2520 2 3611 g10 0 C5 C10 0.5 1 1.5 3 2.5 0.5v 0.7v v rng = 1v v on voltage (v) 0 on-time (ns) 400 600 3611 g12 200 0 1 2 3 1000 i on = 30a 800 i on current (a) 1 10 on-time (ns) 100 1000 10000 10 100 3611 g11 v von = 0v load current (a) 0 i th voltage (v) 1.0 1.5 3611 g09 0.5 0 5 10 15 2.52.0 continuous mode discontinuousmode figure 6 circuit load current (a) 0 ?v out (%) 8 3611 g08 C0.80 C0.60 C0.40 C0.20 0.600.40 0.20 0 2 4 6 10 0.80 figure 6 circuit load current (a) 0 0 frequency (khz) 50 100 150 200 250 300 350 400 450 500 550 600 650 2 4 6 8 3611 g07 10 continuous mode discontinuous mode input voltage (v) 5 frequency (khz) 480 520 25 30 35 3611 g06 440400 10 15 20 640600 560 i load = 10a fcb = 0vfigure 6 circuit i load = 0a input voltage (v) 5 efficiency (%) 90 95 100 25 30 3611 g05 85 80 10 15 20 35 fcb = 5vfigure 6 circuit i load = 10a i load = 1a load current (a) 0.01 50 efficiency (%) 7060 100 9080 0.1 1 10 3611 g04 discontinuous continuous v in = 12v v out = 2.5v extv cc = 5v figure 6 circuit load regulation i th voltage vs load current downloaded from: http:///
ltc3611 6 3611fd typical performance characteristics maximum valley current limit vs temperature input voltage vs maximum valley current maximum valley current limit in foldback feedback reference voltage vs temperature error ampli?er g m vs temperature on-time vs temperature maximum valley current limit vs v rng voltage maximum valley current limit vs run/ss voltage temperature (c) C50 on-time (ns) 200 250 300 25 75 3611 g13 150100 C25 0 50 100 125 50 0 i ion = 30a v von = 0v v rng voltage (v) 0.5 maximum valley current limit (a) 5 10 2015 0.9 3611 g15 0.6 0.7 0.8 1 run/ss voltage (v) 1.65 maximum valley current limit (a) 3 6 9 12 1815 2.65 3611 g16 0 1.9 2.15 2.4 3.15 3.4 2.9 figure 6 circuit temperature (c) C50 maximum valley current limit (a) 5 10 2015 50 3611 g17 0 C25 0 25 100 125 75 v rng = 1v input voltage (v) 4 maximum valley current (a) 6 8 10 16 1814 12 20 3611 g27 4 8 12 16 28 32 36 24 v fb (v) 0 maximum valley current limit (a) 5 10 2015 0.4 3611 g14 0 0.1 0.2 0.3 0.6 0.5 v rng = 1v temperature (c) C50 0.58 feedback reference voltage (v) 0.59 0.60 0.61 0.62 C25 0 25 50 3611 g18 75 100 125 temperature (c) C50 C25 1.0 g m (ms) 1.4 2.0 0 50 75 3611 g19 1.2 1.8 1.6 25 100 125 downloaded from: http:///
ltc3611 7 3611fd typical performance characteristics extv cc switch resistance vs temperature fcb pin current vs temperature run/ss pin current vs temperature run/ss pin current vs temperature undervoltage lockout threshold vs temperature input and shutdown currents vs input voltage intv cc load regulation i extvcc vs frequency input voltage (v) 0 input current (a) shutdown current (a) 800 1000 14001200 15 25 3611 g20 600400 5 10 20 30 200 0 3025 15 5 4035 20 10 0 extv cc open extv cc = 5v shutdown intv cc load current (ma) 0 ?intv cc (%) 0.10 0.20 0.30 40 3611 g21 0 C0.20 C0.10C0.40 C0.30 10 20 30 50 frequency (khz) 400 i extvcc (ma) 5 10 15 3025 20 800 3611 g28 0 500 600 700 1000 900 v in = 24v v out = 2.5v temperature (c) C50 C25 0 extv cc switch resistance () 4 10 0 50 75 3611 g22 2 86 25 100 125 temperature (c) C50 fcb pin current (a) C0.50 C0.25 0 25 75 3611 g23 C0.75C1.00 C25 0 50 100 125 C1.25C1.50 temperature (c) C50 C25 C2 run/ss pin current (a) 0 3 0 50 75 3611 g24 C1 21 25 100 125 pull-up current pull-down current temperature ( c) ?50 3.0 run/ss pin current ( a) 3.5 4.0 4.5 5.0 ?25 0 25 50 3611 g25 75 100 125 latchoff enable latchoff threshold temperature (c) C50 2.0 undervoltage lockout threshold (v) 2.5 3.0 3.5 4.0 C25 0 25 50 3611 g26 75 100 125 downloaded from: http:///
ltc3611 8 3611fd pin functions pgnd (pins 1, 2, 3, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65): power ground. connect this pin closely to the (C) terminal of c vcc and the (C) terminal of c in . sw (pins 4, 5, 6, 7, 8, 9, 10, 11, 26, 55, 66): switch node connection to the inductor. the (C) terminal of the bootstrap capacitor, c b , also connects here. this pin swings from a diode voltage drop below ground up to v in . pv in (pins 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 67): main input supply. decouple this pin to power pgnd with the input capacitance, c in . nc (pin 27): no connection. sgnd (pins 28, 31, 32, 33, 34, 40, 42, 45, 46, 47, 48, 49, 50, 68): signal ground. all small-signal components and compensation components should connect to this ground, which in turn connects to pgnd at one point. boost (pin 29): boosted floating driver supply. the (+) terminal of the bootstrap capacitor, c b , connects here. this pin swings from a diode voltage drop below intv cc up to v in + intv cc . run/ss (pin 30): run control and soft-start input. a capacitor to ground at this pin sets the ramp time to full output current (approximately 3s/f) and the time delay for overcurrent latchoff (see applications information). forcing this pin below 0.8v shuts down the device. v on (pin 35): on-time voltage input. voltage trip point for the on-time comparator. tying this pin to the output volt- age or an external resistive divider from the output makes the on-time proportional to v out . the comparator input defaults to 0.7v when the pin is grounded and defaults to 2.4v when the pin is tied to intv cc . tie this pin to intv cc in high v out applications to use a lower r on value. pgood (pin 36): power good output. open-drain logic output that is pulled to ground when the output voltage is not within 10% of the regulation point. v rng (pin 37): current limit range input. the voltage at this pin adjusts maximum valley current and can be set from 0.7v to 1v by a resistive divider from intv cc . it defaults to 0.7v if the v rng pin is tied to ground which results in a typical 10a current limit. i th (pin 38): current control threshold and error ampli ?er compensation point. the current comparator threshold increases with this control voltage. the voltage ranges from 0v to 2.4v with 0.8v corresponding to zero sense voltage (zero current). fcb (pin 39): forced continuous input. tie this pin to ground to force continuous synchronous operation at low load, to intv cc to enable discontinuous mode operation at low load or to a resistive divider from a secondary output when using a secondary winding. i on (pin 41): on-time current input. tie a resistor from v in to this pin to set the one-shot timer current and thereby set the switching frequency. v fb (pin 43): error ampli?er feedback input. this pin connects the error ampli?er input to an external resistive divider from v out . extv cc (pin 44): external v cc input. when extv cc ex- ceeds 4.7v, an internal switch connects this pin to intv cc and shuts down the internal regulator so that controller and gate drive power is drawn from extv cc . do not exceed 7v at this pin and ensure that extv cc < v in . sv in (pins 51, 52): supply pin for internal pwm controller. intv cc (pins 53, 54): internal 5v regulator output. the driver and control circuits are powered from this voltage. decouple this pin to power ground with a minimum of 4.7f low esr tantalum or ceramic capacitor. downloaded from: http:///
ltc3611 9 3611fd functional diagram 0.7v 1.4v v rng C + C + C + C + C + i on v on i cmp 0.7v fcb extv cc sv in 1a r on v von i ion t on = (10pf) r s q 20k i rev ( 0.5 to 2) 1v shdn switch logic on fcnt 0.6v C + 4.7v ov 1 240k 0.4v i th c ss ea ss 0.6v + C + C 3.3 run/ss 3611 fd sgnd r1 run shdn pgndpgood v fb sw pv in c in boost m1m2 intv cc C + C + uv 0.54v ov 0.66v 6v 0.6v ref 5v reg r2 2.4v 37 35 41 39 44 29 nc 27 4, 5, 6, 7, 8, 9,10, 11, 26, 55, 66 12, 13, 14, 15,16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 67 53, 54 51, 52 1, 2, 3, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65 28, 31, 32, 33, 34,40, 42, 45, 46, 47, 48, 49, 50, 68 36 43 30 38 v out l1 c out c vcc + q1 q3 q4 q2 0.8v i thb q6 c b d b f 1.2a downloaded from: http:///
ltc3611 10 3611fd operation main control loop the ltc3611 is a high ef ?ciency monolithic synchronous, step-down dc/dc converter utilizing a constant on-time, current mode architecture. it operates from an input voltage range of 4.5v to 32v and provides a regulated outpu t voltage at up to 10a of output current. the internal synchronous power switch increases ef?ciency and eliminates the need for an external schottky diode. in normal operation, the top mosfet is turned on for a ?xed interval determined by a one-shot timer ost. when the top mosfet is turned off, the bottom mosfet is turned on until the current comparator i cmp trips, restarting the one-shot timer and initiating the next cycle. inductor current is determined by sensing the voltage between the pgnd and sw pins using the bottom mosfet on-resistance. the voltage on the i th pin sets the comparator threshold corresponding to inductor valley current. the error ampli?er, ea, adjusts this voltage by comparing the feedback signal v fb from the output voltage with an internal 0.6v reference. if the load current increases, it causes a drop in the feedback voltage relative to the reference. the i th voltage then rises until the average inductor current again matches the load current. at light load, the inductor current can drop to zero and become negative. this is detected by current reversal comparator i rev which then shuts off m2 (see func- tional diagram), resulting in discontinuous operation. both switches will remain off with the output capacitor supplying the load current until the i th voltage rises above the zero current level (0.8v) to initiate another cycle. discontinu- ous mode operation is disabled by comparator f when the fcb pin is brought below 0.6v, forcing continuous synchronous operation. the operating frequency is determined implicitly by the top mosfet on-time and the duty cycle required to main- tain regulation. the one-shot timer generates an on-time that is proportional to the ideal duty cycle, thus holding frequency approximately constant with changes in v in . the nominal frequency can be adjusted with an external resistor, r on . overvoltage and undervoltage comparators ov and uv pull the pgood output low if the output feedback volt- age exits a 10% window around the regulation point. furthermore, in an overvoltage condition, m1 is turned off and m2 is turned on and held on until the overvoltage condition clears. foldback current limiting is provided if the output is shorted to ground. as v fb drops, the buffered current threshold voltage i thb is pulled down by clamp q3 to a 1v level set by q4 and q6. this reduces the inductor valley current level to one sixth of its maximum value as v fb approaches 0v. pulling the run/ss pin low forces the controller into its shutdown state, turning off both m1 and m2. releasing the pin allows an internal 1.2a current source to charge up an external soft-start capacitor, c ss . when this voltage reaches 1.5v, the controller turns on and begins switc hing, but with the i th voltage clamped at approximately 0.6v below the run/ss voltage. as c ss continues to charge, the soft-start current limit is removed. intv cc /extv cc power power for the top and bottom mosfet drivers and most of the internal controller circuitry is derived from the intv cc pin. the top mosfet driver is powered from a ?oating bootstrap capacitor, c b . this capacitor is recharged from intv cc through an external schottky diode, d b , when the top mosfet is turned off. when the extv cc pin is grounded, an internal 5v low dropout regulator supplies the intv cc power from v in . if extv cc rises above 4.7v, the internal regulator is turned off, and an internal switch connects extv cc to intv cc . this allows a high ef?ciency source connected to extv cc , such as an external 5v sup- ply or a secondary output from the converter, to provide the intv cc power. voltages up to 7v can be applied to extv cc for additional gate drive. if the input voltage is low and intv cc drops below 3.5v, undervoltage lockout circuitry prevents the power switches from turning on. downloaded from: http:///
ltc3611 11 3611fd the basic ltc3611 application circuit is shown on th e front page of this data sheet. external component selection is primarily determined by the maximum load current. the ltc3611 uses the on-resistance of the synchronous power mosfet for determining the inductor current. the desired amount of ripple current and operating frequency also determines the inductor value. finally, c in is selected for its ability to handle the large rms current into the converter and c out is chosen with low enough esr to meet the output voltage ripple and transient speci ?cation. v on and pgood the ltc3611 has an open-drain pgood output that indicates when the output voltage is within 10% of the regulation point. the ltc3611 also has a v on pin that allows the on-time to be adjusted. tying the v on pin high results in lower values for r on which is useful in high v out applications. the v on pin also provides a means to adjust the on-time to maintain constant frequency operation in applications where v out changes and to correct minor frequency shifts with changes in load current. v rng pin and i limit adjust the v rng pin is used to adjust the maximum inductor valley current, which in turn determines the maximum average output current that the ltc3611 can deliver. the maximum output current is given by: i out(max) = i valley(max) + 1/2 i l the i valley(max) is shown in the ?gure maximum valley current limit vs v rng voltage in the typical performance characteristics. an external resistor divider from intv cc can be used to set the voltage on the v rng pin from 1v to 1.4v, or it can be simply tied to ground force a default value equivalent to 0.7v. do not ?oat the v rng pin. applications information operating frequency the choice of operating frequency is a trade-off between ef?ciency and component size. low frequency operation improves ef?ciency by reducing mosfet switching losses but requires larger inductance and/or capacitance in order to maintain low output ripple voltage. the operating frequency of ltc3611 applications is de- termined implicitly by the one-shot timer that controls the on-time, t on , of the top mosfet switch. the on-time is set by the current into the i on pin and the voltage at the v on pin according to: t on = v von i ion (10pf) tying a resistor r on from v in to the i on pin yields an on-time inversely proportional to v in . the current out of the i on pin is: i ion = v in r on for a step-down converter, this results in approximately constant frequency operation as the input supply varies: f = v out v von r on (10pf) [hz] to hold frequency constant during output voltage cha nges, tie the v on pin to v out or to a resistive divider from v out when v out > 2.4v. the v on pin has internal clamps that limit its input to the one-shot timer. if the pin is tied below 0.7v, the input to the one-shot is clamped at 0.7v. s imilarly, if the pin is tied above 2.4v, the input is clamped at 2.4v. in high v out applications, tying v on to intv cc so that the comparator input is 2.4v results in a lower value for downloaded from: http:///
ltc3611 12 3611fd r on . figures 1a and 1b show how r on relates to switching frequency for several common output voltages. because the voltage at the i on pin is about 0.7v, the cur- rent into this pin is not exactly inversely proportional to v in , especially in applications with lower input voltages. to correct for this error, an additional resistor, r on2 , connected from the i on pin to the 5v intv cc supply will further stabilize the frequency. r on2 = 5v 0.7v r on changes in the load current magnitude will also cause frequency shift. parasitic resistance in the mosfet applications information switches and inductor reduce the effective voltage across the inductance, resulting in increased duty cycle as the load current increases. by lengthening the on-time sligh tly as current increases, constant frequency operation can be maintained. this is accomplished with a resistive divider from the i th pin to the v on pin and v out . the values required will depend on the parasitic resistances in the speci ?c application. a good starting point is to feed about 25% of the voltage change at the i th pin to the v on pin as shown in figure 2a. place capacitance on the v on pin to ?lter out the i th variations at the switching frequency. the resistor load on i th reduces the dc gain of the error amp and degrades load regulation, which can be avoided by using the pnp emitter follower of figure 2b. r on (k) 100 100 switching frequency (khz) 1000 1000 10000 3611 f01a v out = 3.3v v out = 1.5v v out = 2.5v r on (k) 100 100 switching frequency (khz) 1000 1000 10000 3611 f01b v out = 3.3v v out = 12v v out = 5v figure 1a. switching frequency vs r on (v on = 0v) figure 1b. switching frequency vs r on (v on = intv cc ) downloaded from: http:///
ltc3611 13 3611fd minimum off-time and dropout operation the minimum off-time, t off(min) , is the smallest amount of time that the ltc3611 is capable of turning on the bot- tom mosfet, tripping the current comparator and turning the mosfet back off. this time is generally about 250ns. the minimum off-time limit imposes a maximum duty cycle of t on /(t on + t off(min) ). if the maximum duty cycle is reached, due to a dropping input voltage for example, then the output will drop out of regulation. the minimum input voltage to avoid dropout is: v in(min) = v out t on + t off(min) t on a plot of maximum duty cycle vs frequency is shown in figure 3. setting the output voltage the ltc3611 develops a 0.6v reference voltage between the feedback pin, v fb , and the signal ground as shown in figure 6. the output voltage is set by a resistive divider according to the following formula: v out = 0.6v 1 + r2 r1 ?? ? ?? ? applications information to improve the frequency response, a feedforward capaci- tor c1 may also be used. great care should be taken to route the v fb line away from noise sources, such as the inductor or the sw line. inductor selection given the desired input and output voltages, the induc- tor value and operating frequency determine the ripple current: i l = v out f l ?? ? ?? ? 1 ? v out v in ?? ? ?? ? lower ripple current reduces core losses in the inductor, esr losses in the output capacitors and output voltage ripple. highest ef ?ciency operation is obtained at low frequency with small ripple current. however, achieving this requires a large inductor. there is a trade-off between component size, ef?ciency and operating frequency. a reasonable starting point is to choose a ripple current that is about 40% of i out(max) . the largest ripple current occurs at the highest v in . to guarantee that ripple current does not exceed a speci?ed maximum, the inductance should be chosen according to: l = v out f i l(max) ?? ? ?? ? 1 ? v out v in(max) ?? ? ?? ? c von 0.01f r von2 100k r von1 30k c c v out r c (2a) (2b) v on i th ltc3611 c von 0.01f r von2 10k q1 2n5087 r von1 3k 10k c c 3611 f02 v out intv cc r c v on i th ltc3611 2.01.5 1.0 0.5 0 0 0.25 0.50 0.75 3611 f03 1.0 dropout region duty cycle (v out /v in ) switching frequency (mhz) figure 2. correcting frequency shift with load curren t changes figure 3. maximum switching frequency vs duty cycle downloaded from: http:///
ltc3611 14 3611fd once the value for l is known, the type of inductor must be selected. high ef ?ciency converters generally cannot afford the core loss found in low cost powdered iron cores. a variety of inductors designed for high current, low volt- age applications are available from manufacturers such as sumida, panasonic, coiltronics, coilcraft and toko. c in and c out selection the input capacitance, c in , is required to ?lter the square wave current at the drain of the top mosfet. use a low esr capacitor sized to handle the maximum rms current. i rms ? i out(max) v out v in v in v out ? 1 this formula has a maximum at v in = 2v out , where i rms = i out(max) /2. this simple worst-case condition is commonly used for design because even signi?cant de- viations do not offer much relief. note that ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to derate the capacitor. the selection of c out is primarily determined by the esr required to minimize voltage ripple and load step t ransients. the output ripple v out is approximately bounded by: v out i l esr + 1 8fc out ?? ? ?? ? since i l increases with input voltage, the output ripple is highest at maximum input voltage. typically, once the esr requirement is satis?ed, the capacitance is adequate for ?ltering and has the necessary rms current rating. multiple capacitors placed in parallel may be needed to meet the esr and rms current handling requirements. dry tantalum, special polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount pack- ages. special polymer capacitors offer very low esr but have lower capacitance density than other types. tan talum applications information capacitors have the highest capacitance density but it is important to only use types that have been surge tested for use in switching power supplies. aluminum electr olytic capacitors have signi?cantly higher esr, but can be used in cost-sensitive applications providing that consideratio n is given to ripple current ratings and long-term reliability. ceramic capacitors have excellent low esr characteris- tics but can have a high voltage coef?cient and audible piezoelectric effects. the high q of ceramic capacitor s with trace inductance can also lead to signi?cant ringing. when used as input capacitors, care must be taken to ensure that ringing from inrush currents and switching does not pose an overvoltage hazard to the power switches and control- ler. to dampen input voltage transients, add a small 5f to 50f aluminum electrolytic capacitor with an esr in the range of 0.5 to 2. high performance through-hole capacitors may also be used, but an additional ceramic capacitor in parallel is recommended to reduce the effect of their lead inductance. top mosfet driver supply (c b , d b ) an external bootstrap capacitor, c b , connected to the boost pin supplies the gate drive voltage for the topside mosfet. this capacitor is charged through diode d b from intv cc when the switch node is low. when the top mosfet turns on, the switch node rises to v in and the boost pin rises to approximately v in + intv cc . the boost capacitor needs to store about 100 times the gate charge required by the top mosfet. in most applications an 0.1f to 0.47f, x5r or x7r dielectric capacitor is adequate. discontinuous mode operation and fcb pin the fcb pin determines whether the bottom mosfet remains on when current reverses in the inductor. tying this pin above its 0.6v threshold enables discontinuous operation where the bottom mosfet turns off when in- ductor current reverses. the load current at which current reverses and discontinuous operation begins depends on the amplitude of the inductor ripple current and will vary downloaded from: http:///
ltc3611 15 3611fd ltc3611 sgnd 48 sgnd 47 sgnd 46 sgnd 45 extv cc 44 v fb 43 sgnd 42 i on 41 r4 sgnd 40 fcb 39 i th 38 v rng 37 pgood 36 v on 35 sgnd 34 sgnd sgnd pgnd 33 pv in 17 pv in 18 pv in 19 pv in 20 pv in 21 pv in 22 pv in 23 pv in 24 pv in 25 sw sw sw 26 nc 27 sgnd 28 boost 29 run/ss 30 sgnd 31 sgnd 32 pgnd 64 pgnd 63 pgnd 62 pgnd 61 pgnd 60 pgnd 59 pgnd 58 pgnd 57 pgnd 56 sw 55 intv cc 54 intv cc 53 sv in 52 sv in 51 sgnd 50 sgnd 49 pgnd 1 pgnd 2 pgnd 3 sw 4 sw 5 sw 6 sw 7 sw 8 sw 9 sw 10 sw 11 pv in v in 12 pv in 13 pv in 14 pv in 15 pv in 16 3611 f04 c sec 1f v out2 v out1 c out c in in4148 optional extv cc connection5v < v out2 < 7v t1 1:n r3 + + + sgnd with changes in v in . tying the fcb pin below the 0.6v threshold forces continuous synchronous operation, al- lowing current to reverse at light loads and maintaining high frequency operation. in addition to providing a logic input to force continuous operation, the fcb pin provides a means to maintain a ?yback winding output when the primary is operating in discontinuous mode. the secondary output v out2 is normally set as shown in figure 4 by the turns ratio n of the transformer. however, if the controller goes into discontinuous mode and halts switching due to a light primary load current, then v out2 will droop. an external resistor divider from v out2 to the fcb pin sets a minimum voltage v out2(min) below which continuous operation is forced until v out2 has risen above its minimum: v out2(min) = 0.6v 1 + r4 r3 ?? ? ?? ? applications information fault conditions: current limit and foldback the ltc3611 has a current mode controller which inher - ently limits the cycle-by-cycle inductor current not o nly in steady state operation but also in transient. to further limit current in the event of a short circuit to gro und, the ltc3611 includes foldback current limiting. if the outp ut falls by more than 25%, then the maximum sense voltag e is progressively lowered to about one sixth of its ful l value. intv cc regulator and extv cc connection an internal p-channel low dropout regulator produces the 5v supply that powers the drivers and internal circuitry within the ltc3611. the intv cc pin can supply up to 50ma rms and must be bypassed to ground with a minimum of 4.7f tantalum or ceramic capacitor. good bypassing is necessary to supply the high transient currents required by the mosfet gate drivers. figure 4. secondary output loop and extv cc connection downloaded from: http:///
ltc3611 16 3611fd the extv cc pin can be used to provide mosfet gate drive and control power from the output or another external source during normal operation. whenever the extv cc pin is above 4.7v the internal 5v regulator is shut off and an internal 50ma p-channel switch connects the extv cc pin to intv cc . intv cc power is supplied from extv cc until this pin drops below 4.5v. do not apply more than 7v to the extv cc pin and ensure that extv cc v in . the following list summarizes the possible connections for extv cc : 1. extv cc grounded. intv cc is always powered from the internal 5v regulator. 2. e xtv cc connected to an external supply. a high ef ?ciency supply compatible with the mosfet gate drive require- ments (typically 5v) can improve overall ef?ciency. 3 . extv cc connected to an output derived boost network. the low voltage output can be boosted using a charge pump or ?yback winding to greater than 4.7v. the system will start-up using the internal linear regulator until the boosted output supply is available. soft-start and latchoff with the run/ss pin the run/ss pin provides a means to shut down the ltc 3611 as well as a timer for soft-start and overcurrent latchoff. pulling the run/ss pin below 0.8v puts the ltc3611 into a low quiescent current shutdown (i q < 30a). releasing the pin allows an internal 1.2a current source to charge up the external timing capacitor, c ss . if run/ss has been pulled all the way to ground, there is a delay before starting of about: t delay = 1.5v 1.2 a c ss = 1.3s/ f ( ) c ss when the voltage on run/ss reaches 1.5v, the ltc3611 begins operating with a clamp on i th of approximately 0.9v. as the run/ss voltage rises to 3v, the clamp on i th is raised until its full 2.4v range is available. this takes an applications information additional 1.3s/f, during which the load current is folded back until the output reaches 75% of its ?nal value. after the controller has been started and given adequate time to charge up the output capacitor, c ss is used as a short-circuit timer. after the run/ss pin charges ab ove 4v, if the output voltage falls below 75% of its regulated value, then a short-circuit fault is assumed. a 1.8a current then begins discharging c ss . if the fault condition persists until the run/ss pin drops to 3.5v, then the controller turns off both power mosfets, shutting down the converter permanently. the run/ss pin must be actively pulled down to ground in order to restart operation. the overcurrent protection timer requires that the soft- start timing capacitor, c ss , be made large enough to guarantee that the output is in regulation by the time c ss has reached the 4v threshold. in general, this will depend upon the size of the output capacitance, output voltage and load current characteristic. a minimum soft-start capacitor can be estimated from: c ss > c out v out r sense (10 C4 [f/v s]) generally 0.1f is more than suf?cient. overcurrent latchoff operation is not always needed or desired. load current is already limited during a short circuit by the current foldback circuitry and latchoff op- eration can prove annoying during troubleshooting. the feature can be overridden by adding a pull-up current greater than 5a to the run/ss pin. the additional cur- rent prevents the discharge of c ss during a fault and also shortens the soft-start period. using a resistor to v in as shown in figure 5a is simple, but slightly increases shut- down current. connecting a resistor to intv cc as shown in figure 5b eliminates the additional shutdown current, but requires a diode to isolate c ss . any pull-up network must be able to pull run/ss above the 4.2v maximum threshold of the latchoff circuit and overcome the 4a maximum discharge current. downloaded from: http:///
ltc3611 17 3611fd ef?ciency considerations the percent ef ?ciency of a switching regulator is equal to the output power divided by the input power times 100%. it is often useful to analyze individual losses to determine what is limiting the ef?ciency and which change would produce the most improvement. although all dissipative elements in the circuit produce losses, four main sources account for most of the losses in ltc3611 circuits: 1 . dc i 2 r losses. these arise from the resistance of the internal resistance of the mosfets, inductor and pc boa rd traces and cause the ef?ciency to drop at high output currents. in continuous mode the average output current ?ows through l, but is chopped between the top and bot- tom mosfets. if the two mosfets have approximately the same r ds(on) , then the dc i 2 r loss for one mosfet can simply be determined by [r ds(on) + r l ] i o . 2. transition loss. this loss arises from the brief amount of time the top mosfet spends in the saturated region during switch node transitions. it depends upon the input voltage, load current, driver strength and mosfet capacitance, among other factors. the loss is signi?cant at input voltages above 20v and can be estimated from: t ransition loss ? (1.7a C1 ) v in 2 i out c rss f applications information 3. intv cc current. this is the sum of the mosfet driver and control currents. this loss can be reduced by sup- plying intv cc current through the extv cc pin from a high ef?ciency source, such as an output derived boost network or alternate supply if available. 4 . c in loss. the input capacitor has the dif?cult job of ?ltering the large rms input current to the regulator. it mu st have a very low esr to minimize the ac i 2 r loss and suf?cient capacitance to prevent the rms current from causing ad- ditional upstream losses in fuses or batteries. other losses, including c out esr loss, schottky diode d1 conduction loss during dead time and inductor core loss generally account for less than 2% additional loss. when making adjustments to improve ef?ciency, the input current is the best indicator of changes in ef?ciency. if you make a change and the input current decreases, then the ef?ciency has increased. if there is no change in input current, then there is no change in ef?ciency. checking transient response the regulator loop response can be checked by looking at the load transient response. switching regulators take several cycles to respond to a step in load current. when a load step occurs, v out immediately shifts by an amount equal to i load (esr), where esr is the effective series resistance of c out . i load also begins to charge or dis- charge c out generating a feedback error signal used by the regulator to return v out to its steady-state value. during this recovery time, v out can be monitored for overshoot or ringing that would indicate a stability problem. the i th pin external components shown in figure 6 will provide adequate compensation for most applications. for a detailed explanation of switching control loop theory see application note 76. figure 5. run/ss pin interfacing with latchoff defeated 3.3v or 5v run/ss v in intv cc run/ss d1 (5a) (5b) d2* c ss r ss * c ss *optional to override overcurrent latchoff r ss * 3611 f05 2n7002 downloaded from: http:///
ltc3611 18 3611fd design example as a design example, take a supply with the following speci ?cations: v in = 5v to 36v (12v nominal), v out = 2.5v 5%, i out(max) = 10a, f = 550khz. first, calculate the timing resistor with v on = v out : r on = 2.5v (2.4) 550khz ( ) 10pf ( ) = 187k and choose the inductor for about 40% ripple current at the maximum v in : l = 2.5v 550khz ( ) 0.4 ( ) 10a ( ) 1 ? 2.5v 36v ?? ? ?? ? = 1h selecting a standard value of 1h results in a maximum ripple current of: i l = 2.5v 550khz ( ) 1 h ( ) 1? 2.5v 12v ?? ? ?? ? = 3.6a applications information next, set up v rng voltage and check the i limit . tying v rng to 1v will set the typical current limit to 15a, and tying v rng to gnd will result in a typical current around 10a. c in is chosen for an rms current rating of about 5a at 85c. the output capacitors are chosen for a low esr of 0.013 to minimize output voltage changes due to inductor ripple current and load steps. the ripple voltage will be only: v out(ripple) = i l(max) (esr) = (3.6a) (0.013) = 47mv however, a 0a to 10a load step will cause an output change of up to: v out(step) = i load (esr) = (10a) (0.013) =130mv an optional 22f ceramic output capacitor is included to minimize the effect of esl in the output ripple. the complete circuit is shown in figure 6. figure 6. design example: 5v to 32v input to 2.5v/10a at 550khz v out 2.5v at 10a gnd gnd v in v in 5v to 32v c out1 100f 2 c5 22f 6.3v l1 1h c in 4.7f 50v 2 c6 100f 50v + (optional) (optional) c in = murata grm32er71h475k c out = murata grm43sr60j107m l 1 = cooper hcp0703-iro c5: murata grm31cr60j226ke19 keep power and signal grounds separate. connect to one point. ltc3611 sgnd 48 sgnd 47 sgnd 46 sgnd 45 extv cc extv cc 44 v fb 43 sgnd 42 i on 41 sgnd 40 fcb 39 i th 38 v rng 37 pgood 36 v on 35 sgnd 34 sgnd v out v out 33 pv in 17 pv in 18 pv in 19 pv in 20 pv in 21 pv in 22 pv in 23 pv in 24 pv in 25 sw sw sw sw 26 nc 27 sgnd 28 boost 29 run/ss 30 sgnd 31 sgnd 32 pgnd 64 pgnd 63 pgnd 62 pgnd 61 pgnd 60 pgnd 59 pgnd 58 pgnd 57 pgnd 56 sw 55 intv cc intv cc intv cc 54 intv cc intv cc 53 sv in v in 52 sv in 51 sgnd 50 sgnd 49 pgnd 1 pgnd 2 pgnd 3 sw 4 sw 5 sw 6 sw 7 sw 8 sw 9 sw 10 sw 11 pv in v in 2 12 pv in 13 pv in 14 pv in 15 pv in 16 3611 f06 c f 0.1f 50v c vcc 4.7f 6.3v c on 0.01f c4 0.01f c2 c1 0.01f c b1 0.22f d b cmdsh-3 c ss 0.1f v in r ss1 510k (optional) (optional) (optional) r19.5k 1% r230.1k 1% r von 0 r pg1 100k 39.2k r on 182k 1% r5 12.5k r311k c c1 680pf c c2 100pf (optional) sgnd pgnd downloaded from: http:///
ltc3611 19 3611fd applications information how to reduce sw ringing as with any switching regulator, there will be voltage ring- ing on the sw node, especially for high input voltages. the ringing amplitude and duration is dependent on the switching speed (gate drive), layout (parasitic inductance) and mosfet output capacitance. this ringing contributes to the overall emi, noise and high frequency ripple. one way to reduce ringing is to optimize layout. a good layout minimizes parasitic inductance. adding rc snubbers from sw to gnd is also an effective way to reduce ringing. finally, adding a resistor in series with the boost pin will slow down the mosfet turn-on slew rate to dampen r i nging, but at the cost of reduced ef ?ciency. note that since the ic is buffered from the high frequency transients by pcb and bondwire inductances, the ringing by itself is normally not a concern for controller reliability. pc board layout checklist when laying out a pc board follow one of the two sug- gested approaches. the simple pc board layout requires a dedicated ground plane layer. also, for higher currents, a multilayer board is recommended to help with heat sinking of power components. t he ground plane layer should not have any traces and it should be as close as possible to the layer with the ltc3611. place c in and c out all in one compact area, close to the ltc3611. it may help to have some components on the bottom side of the board. k eep small-signal components close to the ltc3611. ground connections (including ltc3611 sgnd and pgnd) should be made through immediate vias to the ground plane. use several larger vias for power components. u se a compact plane for the switch node (sw) to impro ve cooling of the mosfets and to keep emi down. u se planes for v in and v out to maintain good voltage ?ltering and to keep power losses low. f lood all unused areas on all layers with copper. flood- ing with copper reduces the temperature rise of power components. connect these copper areas to any dc net (v in , v out , gnd or to any other dc rail in your system). when laying out a printed circuit board without a ground plane, use the following checklist to ensure proper opera- tion of the controller. these items are also illustrated in figure 7. s egregate the signal and power grounds. all small- signal components should return to the sgnd pin at one point, which is then tied to the pgnd pin. connect the input capacitor(s), c in , close to the ic. this capacitor carries the mosfet ac current. k eep the high dv/dt sw, boost and tg nodes away from sensitive small-signal nodes. c onnect the intv cc decoupling capacitor, c vcc , closely to the intv cc and pgnd pins. connect the top driver boost capacitor, c b , closely to the boost and sw pins. c onnect the v in pin decoupling capacitor, c f , closely to the v in and pgnd pins. downloaded from: http:///
ltc3611 20 3611fd applications information figure 7. ltc3611 layout diagram ltc3611 sgnd 48 sgnd 47 sgnd 46 sgnd 45 extv cc 44 v fb 43 sgnd 42 i on 41 sgnd 40 fcb 39 i th 38 v rng 37 pgood 36 v on 35 sgnd 34 33 pv in 17 pv in 18 pv in 19 pv in 20 pv in 21 pv in 22 pv in 23 pv in 24 pv in 25 sw 26 nc 27 sgnd 28 boost 29 run/ss 30 sgnd 31 sgnd 32 pgnd 64 pgnd 63 pgnd 62 pgnd 61 pgnd 60 pgnd 59 pgnd 58 pgnd 57 pgnd 56 sw sw 55 intv cc 54 intv cc 53 sv in 52 sv in 51 sgnd 50 sgnd 49 pgnd 1 pgnd 2 pgnd 3 sw 4 sw 5 sw 6 sw 7 sw 8 sw 9 sw 10 sw 11 pv in 12 pv in 13 pv in 14 pv in 15 pv in 16 3611 f07 c in c out v out c vcc c b d b c ss r1 r f r on r2 r c c c1 c c2 downloaded from: http:///
ltc3611 21 3611fd 3.3v input to 1.5v/10a at 750khz typical applications ltc3611 sgnd 48 sgnd 47 sgnd 46 sgnd 45 extv cc 44 v fb 43 sgnd 42 i on 41 sgnd 40 fcb 39 i th 38 v rng 37 pgood 36 v on 35 sgnd 34 sgnd pgnd sgnd v out 1.5v at 10a v out v out gnd gnd 33 pv in 17 pv in 18 pv in 19 pv in 20 pv in 21 pv in 22 pv in 23 pv in 24 pv in 25 sw sw 26 nc 27 sgnd 28 boost 29 run/ss 30 sgnd 31 sgnd 32 pgnd 64 pgnd 63 pgnd 62 pgnd 61 pgnd 60 pgnd 59 pgnd 58 pgnd 57 pgnd 56 sw 55 intv cc intv cc intv cc 54 intv cc intv cc 53 sv in v in2 = 5v 52 sv in 51 sgnd 50 sgnd 49 pgnd 1 pgnd 2 pgnd 3 sw 4 sw 5 sw 6 sw 7 sw 8 sw 9 sw 10 sw 11 pv in v in v in 12 pv in 13 pv in 14 pv in 15 pv in 16 3611 ta02 c out1 100f 2 c5 22f 6.3v l1 0.47h c f 0.1f50v c in 4.7f 50v 2 c vcc 4.7f 6.3v c6 100f 50v + (optional) (optional) c5: taiyo yuden jmk316bj226ml-tc in : murata grm31cr71h475k c out1 : murata grm435r60j107m l1: toko fdv0630-r47m keep power and signal grounds separate. connect to one point. c von c on 0.01f c40.01f c2 c1 c b1 0.22f 2 c ss 0.1f v in r ss1 510k (optional) (optional) (optional) (optional) (optional) r120.43k 1% r230.1k 1% r pg1 100k 11k 39.2k r on 113k 1% r5 12.5k c c1 1500pf c c2 100pf v in 3.3v downloaded from: http:///
ltc3611 22 3611fd 5v to 24v input to 1.2v/10a at 550khz typical applications v out 1.2v at 10a gnd gnd v in c out1 100f 2 c5 22f 6.3v l1 0.47h c in 4.7f 50v 2 c6 100f 50v + (optional) (optional) c5: taiyo yuden jmk316bj226ml-tc in : murata grm32er71h475k c out1 : murata grm435r60j167m l1: toko hcpo703-or47 keep power and signal grounds separate. connect to one point. ltc3611 sgnd 48 sgnd 47 sgnd 46 sgnd 45 extv cc extv cc 44 v fb 43 sgnd 42 i on 41 sgnd 40 fcb 39 i th 38 v rng 37 pgood 36 v on 35 sgnd 34 sgnd sgnd pgnd sgnd v out v out 33 pv in 17 pv in 18 pv in 19 pv in 20 pv in 21 pv in 22 pv in 23 pv in 24 pv in 25 sw 26 nc 27 sgnd 28 29 run/ss 30 sgnd 31 sgnd 32 pgnd 64 pgnd 63 pgnd 62 pgnd 61 pgnd 60 pgnd 59 pgnd 58 pgnd 57 pgnd 56 sw 55 intv cc intv cc 54 intv cc intv cc 53 sv in v in 52 sv in 51 sgnd 50 sgnd 49 pgnd 1 pgnd 2 pgnd 3 sw 4 sw 5 sw 6 sw 7 sw 8 sw 9 sw 10 sw 11 pv in v in 12 pv in 13 pv in 14 pv in 15 pv in 16 3611 ta03 c f 0.1f50v c vcc 4.7f 6.3v c on 0.01f c40.01f c2 c1 d b cmdsh-3 c ss 0.1f 2 v in r ss1 510k (optional) (optional) (optional) (optional) r130k 1% r230.1k 1% r pg1 100k 39.2k 11k r on 182k 1% r5 4.75k c c1 1500pf c c2 100pf c von (optional) v in 5v to 24v sw boost intv cc c b1 0.22f downloaded from: http:///
ltc3611 23 3611fd typical applications 5v to 28v input to 1.8v/10a all ceramic 1mhz v out 1.8v at 10a gnd v in v in 5v to 28v c out 100f 2 c5 22f 6.3v l1 0.68h c in 4.7f 50v 2 (optional) c out : murata grm32er60j107me20l c in : murata grm32er71h475k l1: vishay ihlp2525czerr68m01 keep power and signal grounds separate. connect to one point. ltc3611 sgnd 48 sgnd 47 sgnd 46 sgnd 45 extv cc extv cc 44 v fb 43 sgnd 42 i on 41 sgnd 40 fcb 39 i th 38 v rng 37 pgood 36 v on 35 sgnd 34 sgnd pgnd sgnd v out v out 33 pv in 17 pv in 18 pv in 19 pv in 20 pv in 21 pv in 22 pv in 23 pv in 24 pv in 25 sw 26 nc 27 sgnd 28 29 run/ss 30 sgnd 31 sgnd 32 pgnd 64 pgnd 63 pgnd 62 pgnd 61 pgnd 60 pgnd 59 pgnd 58 pgnd 57 pgnd 56 sw 55 intv cc intv cc 54 intv cc intv cc 53 sv in v in 52 sv in 51 sgnd 50 sgnd 49 pgnd 1 pgnd 2 pgnd 3 sw 4 sw 5 sw 6 sw 7 sw 8 sw 9 sw 10 sw 11 pv in v in 12 pv in 13 pv in 14 pv in 15 pv in 16 3611 ta04 c f 0.1f50v c vcc 4.7f 6.3v c on 0.01f c40.01f c2 c1 47pf d b cmdsh-3 c ss 0.1f v in r ss1 510k (optional) (optional) (optional) r110k 1% r220k 1% r pg1 100k 9.31k 39.2k r on 102k 1% r5 12.7k c c1 680pf c c2 100pf c von (optional) sw boost intv cc c b1 0.22f 2 downloaded from: http:///
ltc3611 24 3611fd package description wp package 64-lead qfn multipad (9mm 9mm) (reference ltc dwg # 05-08-1812 rev a) 9.00 bsc 9.00 bsc 17 16 32 33 bottom view (bottom metallization details) top view 0.90 0.10 // ccc c 0.20 ref 0.00 ? 0.05 0.30 ? 0.50 wp64 qfn rev a 0707 0.20 ? 0.30 nx b seating plane 6 5 0.08 c aaa c aaa c m ac b bbb nx a b 2x 2x 3.30 1.19 49 48 50 51 52 53 54 64 1 1.39 1.17 0.53 (2x) 1.92 2.01 3.06 4.10 3.30 0.30 (2x) 0.95 3.50 0.87 3.60 0.50 1.81 2.04 2.98 3.99 4.53 note:1. dimensioning and tolerancing conform to asme y14.5m-1994 2. all dimensions are in millimeters, angles are in degrees ( ) 3. n is the total number of terminals4. the location of the terminal #1 identifier and terminal numbering convention conforms to jedec publication 95 spp-002 6 coplanarity applies to the terminals and all other surface metallization 5 dimension b applies to metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. symbol aaa bbb ccc tolerance 0.150.10 0.10 3.85 1.42 pad 1 corner recommended solder pad layout top view 0.30 ? 0.50 3.30 1.19 1.17 1.92 2.01 3.06 4.10 0.53 (2x) 1.39 3.30 0.30 (2x) 2.30 3.50 0.87 3.60 pin 1 0.50 1.81 2.04 2.98 3.99 4.53 0.20 ? 0.30 3.85 1.42 0.95 1.30 1.30 downloaded from: http:///
ltc3611 25 3611fd information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as de scribed herein will not infringe on existing patent rights. revision history rev date description page number d 06/10 updated sw voltage range in absolute maximum ratings. note 4 updated. 24 (revision history begins at rev d) downloaded from: http:///
ltc3611 26 3611fd linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ?? linear technology corporation 2008 lt 0610 rev d ? printed in usa related parts typical application part number description comments ltc1778 no r sense current mode synchronous step-down controller up to 97% ef ?ciency, v in : 4v to 36v, 0.8v v out (0.9)(v in ), i out up to 20a ltc3411 1.25a (i out ), 4mhz, synchronous step-down dc/dc converter 95% ef?ci ency, v in : 2.5v to 5.5v, v out : 0.8v, i q : 60a, i sd : <1a, ms package ltc3412 2.5a (i out ) 4mhz synchronous step-down dc/dc converter 95% ef?ciency, v in : 2.5v to 5.5v, v out(min) : 0.8v, i q : 60ma, i sd : <1ma, tssop16e ltc3414 4a (i out ), 4mhz, synchronous step-down dc/dc converter 95% ef?ciency, v in : 2.25v to 5.5v, v out(min) = 0.8v, i q = 64a, i sd : <1a, tssop20e package ltc3418 8a (i out ), 4mhz, synchronous step-down dc/dc converter 95% ef?ciency, v in : 2.25v to 5.5v, v out(min) = 0.8v, thermally enhanced 38-lead qfn package ltc3610 12a current mode monolithic synchronous step- down converter up to 24v input (28v maximum), current mode extremely f ast transient response ltc3770 fast, no r sense step-down synchronous controller with margining, tracking, pll 0.67% 0.6v reference voltage; programmable margining; true current mode; 4v v in 32v ltc3778 low v out , no r sense synchronous step-down controller 0.6v v out (0.9) v in , 4v v in 36v, i out up to 20a lt3800 60v synchronous step-down controller current mode, outpu t slew rate control ltm4600hv 10a complete switch mode power supply 92% ef?ciency, v in : 4.5v to 28v, v out : 0.6v, true current mode control, ultrafast transient response ltm4601hv 12a complete switch mode power supply 92% ef?ciency, v in : 4.5v to 28v, v out : 0.6v, true current mode control, ultrafast transient response ltm4602hv 6a complete switch mode power supply 9 2 % ef?ciency, v in : 4.5v to 28v, v out : 0.6v, true current mode control, ultrafast transient response ltm4603hv 6a complete switch mode power supply 9 3 % ef?ciency, v in : 4.5v to 28v, with pll, output tracking and margin ing 14v to 32v input to 12v/5a at 500khz v out 12v at 5a gnd gnd v in v in 14v to 32v c out 180f 16v c5 22f 25v l1 4.7h c in 4.7f 50v 2 + c6 100f 50v + (optional) (optional) c in : grm31cr71h475k c out : sanyo 16svp180mx l1: hcp0703-4r7-r keep power and signal grounds separate. connect to one point. ltc3611 sgnd 48 sgnd 47 sgnd 46 sgnd 45 extv cc extv cc 44 v fb 43 sgnd 42 i on 41 sgnd 40 fcb 39 i th 38 v rng 37 pgood 36 v on 35 sgnd 34 sgnd pgnd sgnd i ntvcc v out 33 pv in 17 pv in 18 pv in 19 pv in 20 pv in 21 pv in 22 pv in 23 pv in 24 pv in 25 sw 26 27 sgnd 28 29 run/ss 30 sgnd 31 sgnd 32 pgnd 64 pgnd 63 pgnd 62 pgnd 61 pgnd 60 pgnd 59 pgnd 58 pgnd 57 pgnd 56 sw 55 intv cc intv cc 54 intv cc intv cc 53 sv in v in 52 sv in 51 sgnd 50 sgnd 49 pgnd 1 pgnd 2 pgnd 3 sw 4 sw 5 sw 6 sw 7 sw 8 sw 9 sw 10 sw 11 pv in v in 12 pv in 13 pv in 14 pv in 15 pv in 16 3611 ta05 c f 0.1f50v c vcc 4.7f 6.3v c on 0.01f c40.01f c2 c1 run/ss c ss 0.1f v in r ss1 510k (optional) (optional) (optional) r11.58k 1% r230.1k 1% r pg1 100k r on 1m 1% r5 20k c c1 560pf c c2 100pf (optional) c von (optional) nc d b cmdsh-3 sw boost intv cc c b1 0.22f downloaded from: http:///

▲Up To Search▲

Price & Availability of LTC3611EWPPBF

	To Download LTC3611EWPPBF Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .